The most common defect is a drain or source shorted to the bulk silicon channel, not a leaky or shorted gate like on my Z1 process. I’ve made 15 chips (1,500 transistors) and know there’s at least one completely functional chip and at least two “mostly functional”, meaning ~80% of the transistors work instead of 100%. Testing each chip is very tedious so I am trying to automate the process and I’ll post more data then. More interesting circuits are definitely possible even with this low transistor density. The process needs some tweaking but now that I’m able to consistently make good quality transistors I should be able to design more complex digital and analog circuits. So far I’ve made an opamp (Z1) and a memory-like array (Z2). This value goes up about 100x in ambient room lighting.
I was particularly surprised by the super low leakage current. The new FETs have excellent characteristics: NMOS Electrical Properties: By switching to a polysilicon gate process, I get a ton of performance benefits (self aligned gate means lower overlap capacitances) including a much lower Vth which makes these chips compatible with 2.5V and 3.3V logic levels. I used these metal gate transistors in a few fun projects like a guitar distortion pedal and a ring oscillator LED blinker but both of these required one or two 9V batteries to run the circuit due to high Vth. The aluminum gate has a large work function difference with the silicon channel beneath it which results in a high threshold voltage (>10V). Previously, I made chips with a metal gate process. The Intel 4004 has 2,200 transistors and I’ve now made 1,200 on the same piece of silicon. My chip is a simple 10×10 array of transistors to test, characterize, and tweak the process but this is a huge step closer to more advanced DIY computer chips. The Z1 had 6 transistors and was a great test chip to develop all the processes and equipment. The Z2 has 100 transistors on a 10µm polysilicon gate process – same technology as Intel’s first processor.
I was a senior in high school when I made the Z1 amplifier, and now I’m a senior in college so there are some long overdue improvements to the amateur silicon process. In 2018 I made the first lithographically fabricated integrated circuits in my garage fab.
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